MAX5550ETE+T【PDF 4/15 页】IC DAC 10BIT DUAL 30MA 16-TQFN

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MAX5550

Applications Information

Daisy Chaining (SPI/

I2C = VDD)

In standard SPI-/QSPI-/MICROWIRE-compatible

systems, a microcontroller (C) communicates with its

slave devices through a 3- or 4-wire serial interface.

The typical interface includes a chip-select signal (CS),

a serial clock (SCLK), a data input signal (DIN), and

sometimes a data signal output (DOUT). In this system,

the C allots an independent slave-select signal (SS_)

to each slave device so that they can be addressed

individually. Only the slaves with their CS inputs assert-

ed low acknowledge and respond to the activity on the

serial clock and data lines. This is simple to implement

when there are very few slave devices in the system.

An alternative method is daisy chaining. Daisy

chaining, in serial-interface applications, is the method

of propagating commands through devices connected

in series (see Figure 8).

Daisy chain devices by connecting the DOUT of one

device to the DIN of the next. Connect the SCLK of all

devices to a common clock and connect the CS of all

devices to a common slave-select line. Data shifts out of

DOUT 16.5 clock cycles after it is shifted into DIN on the

falling edge of SCLK. In this configuration, the C only

needs three signals (SS, SCK, and MOSI) to control all of

the slaves in the network. The SPI-/QSPI-/MICROWIRE-

compatible serial interface normally works at up to

10MHz, but must be slowed to 5MHz if daisy chaining.

DOUT is high impedance when CS is high.

Dual, 10-Bit, Programmable, 30mA

High-Output-Current DAC

______________________________________________________________________________________

10111213141516

SCLK

DIN

Figure 7. SPI-Interface Format

QSPI is a trademark of Motorola, Inc.

MICROWIRE is a trademark of National Semiconductor Corp.

tCSW

tCS1

tCSD

tCSH

LSB

tDO1

tCL

tCP

tCH

tDH

tDS

MSB

tCSS

tCSO

SCLK

DIN

DOUT

tCSE

Figure 6. SPI-Interface Timing Diagram

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